1. Field of the Invention
The present invention relates to an error detection and correction circuit, and more particularly to a circuit for detecting and correcting an error of a code train transmitted via a transmission path such as a magnetic recording/reproducing system.
2. Related Background Art
In a recording/reproducing system for digital data (code train), i.e., in a data transmission system, error detection and correction codes are generally used for correcting an error generated during the data transmission. FIG. 1 is a block diagram showing an example of the circuit arrangement of a conventional error detection and correction circuit. Digital data (word train) is input to an input terminal 10, the digital data having been error-correction coded at the recording (or transmitting) side and passed through a transmission system and may include a transmission error. A data reproduction circuit 12 causes the input data at the input terminal 10 to be subjected to demodulation, synchronous separation, ID recognition, and other processes to thereby reproduce each data (word) and output the reproduced data. This reproduced data (code train) is directly written in a data memory 20 in accordance with the recognized ID information, and is also applied to a syndrome calculation circuit 14 for error correction.
In accordance with a known manner, the syndrome calculation circuit 14 executes a syndrome calculation for each error correction code constructed from a plurality of transmission words, and sequentially writes a plurality of syndromes for each error correction code into a syndrome memory 16. An error position and error pattern calculation circuit 18 reads syndromes written in the syndrome memory 16 and decodes the error correction code. The circuit 18 may be constructed of a general arithmetic operation processing circuit, and the operation thereof is controlled by a microprogram 19. If an error is detected and it is judged that the error is correctable, then the error position and error pattern are calculated, and using the calculated results the data (code) in the data memory 20 is corrected. If it is judged that the error is not correctable, the corresponding data (code) in the data memory 20 is maintained unchanged, and a correction flag indicative of a presence of an error is entered in the data memory 20 while performing other necessary processes.
After the above operations, the error-corrected data (codes) in the data memory 20 is outputted from an output terminal 22.
In the conventional circuit described above, if digital data to be processed is image data, uncorrectable data can be corrected by means of interpolation at a high probability. In such a case, the quality of image is deteriorated by a large probability of error correction rather than by a large probability of uncorrectable error and interpolation. Namely, the degree of deterioration of the image quality is greater upon occurrence of error correction.
With the advent of a recent transmission path having a large change in transmission error rate such as in the case of a satellite broadcasting system whose error rate depends on weather conditions, there has been highly desired away to improve image quality under bad weather conditions. One way to solve this is to enhance the error correction capability of the transmission system to the extent that it can support the worst case. However, this solution is not practical because large cast and facilities are required for such an enhanced error correction capability.